The present invention relates to an amplifier having an improved power supply circuit. More particularly, the invention relates to a power amplifier having an improved power supply circuit.
To improve the power conversion efficiency of a power amplifier, a technique of changing the supply voltage level according to a circuit output signal level has been employed. FIG. 1 shows an example of a circuit constructed in accordance with such a technique, wherein a signal applied to an input terminal 1 is amplified by a voltage-amplifying stage 2 before being applied to a complementary push-pull power amplifying stage composed of transistors Q1 and Q2 for power amplification. The push-pull stage output is applied to a load 13, such as a speaker, provided between the output terminal 3 and a ground terminal 4.
To supply power to the power-amplifying stage, first voltage supplies 7 and 8 and second voltage supplies 9 and 10 are provided. The relationship between the output voltages .+-.B.sub.L of the first supplies 7 and 8 and the output voltages .+-.B.sub.H of the second supplies 9 and 10 is set to satisfy .vertline.B.sub.L .vertline.&lt;.vertline.B.sub.H .vertline..
In addition, differential amplifiers 5 and 6 are provided for shifting the circuit output level by a constant voltage .vertline.E.vertline. applied to first input terminals a from reference voltage supplies 11 and 12. The collector terminals (which are also the supply terminals in the power-amplifying stage) of the transistors Q1 and Q2 are applied to input terminals b of the differential amplifiers 5 and 6. The outputs of the differential amplifiers 5 and 6 provide inputs for controlling the bases of transistors Q3 and Q4, which are connected as active elements between the collector terminals of the transistors Q1 and Q2 and the second voltage supplies 9 and 10, respectively. Thus, a first negative feedback amplifier circuit is constituted by the amplifier 5 and the transistor Q3, and a second by the amplifier 6 and the transistor Q4. With this arrangement, as long as the transistors Q3 and Q4 are in an active state, a voltage obtained by shifting the circuit output level by a constant value is applied to the collector terminals of the transistors Q1 and Q2.
In addition, the output voltages .+-.B.sub.L of the first voltage supplies 7 and 8 are supplied to the collector terminals of the transistors Q1 and Q2 via respective diodes D1 and D2. As a result, if the level of the circuit output signal V.sub.o is below .vertline.B.sub.L .vertline.&gt;.vertline.V.sub.o +E.vertline., the transistors Q3 and Q4 will be off. Therefore, power is supplied to the transistors Q1 and Q2 from the respective first voltage supplies 7 and 8. On the other hand, if the level of the circuit output signal V.sub.o is above .vertline.B.sub.L .vertline..ltoreq..vertline.V.sub.o +E.vertline., the diodes D1 and D2 will be turned off. Then the collector outputs from the transistors Q3 and Q4 are applied to the transistors Q1 and Q2 in place of the voltages from the first supplies 7 and 8. In this case, since negative feedback amplifier circuits are constituted by the amplifiers 5 and 6 and the transistors Q3 and Q4, respectively, the voltages applied to the collectors of each of the transistors Q1 and Q2 is at a level of .vertline.V.sub.o +E.vertline. because of the negative feedback action.
FIG. 3 is a waveform diagram indicating the aforementioned operation, and FIG. 4 shows the relationship between output power and lost power. In FIG. 4, solid and dotted lines respectively indicate the power loss versus output power characteristic of the circuit configuration of FIG. 1 and the same characteristic for a circuit configuration in which the supply level is always kept constant. It may be seen that the power conversion efficiency is very significantly better with the circuit shown in FIG. 1.
FIG. 2 is a schematic diagram showing a specific example of the circuit shown in FIG. 1, wherein the differential amplifier 5 is composed of transistors Q7 and Q8, resistors R1-R5, and a current source I1, the differential amplifier 6 includes transistors Q9 and Q10, resistors R6-R10, and a current source I2. The outputs of the differential amplifiers 5 and 6 are used as the inputs for driving the bases of the transistors Q5 and Q6, which are connected to the transistors Q3 and Q4 in a Darlington configuration. Capacitors C1 and C2, coupled between the bases and collectors of the transistors Q5 and Q6, are used for phase compensation. Zener diodes D3 and D4 form the reference voltage sources 11 and 12 for shifting the circuit output level. Current sources I3 and I4 are provided for supplying current for operating the diodes D3 and D4. Other parts constituting the circuit are the same as those shown in FIG. 1.
In the circuit configuration shown in FIGS. 1 and 2, the instant that the transistors Q3 and Q4 assume their active states when the input signal level becomes sufficiently high, the states of the diodes D1 and D2 are changed from on to off. At this time, although the diodes D1 and D2 are reverse biased, some amount of current continues to flow therethrough. In addition, since there always exists a time lag until the transistors Q3 and Q4 reach their active states, the high frequency response of the circuit is not adequate in some instances. Moreover, when the states of the transistors Q3 and Q4 are changed from on to off and when those of the diodes are changed from off to on, the same phenomenon occurs, which greatly adversely affects the output signal. Shown in the lowermost portion in FIG. 3 is an example of a distorted waveform due to the above-mentioned phenomenon in the case of the high frequency signal.
An object of the present invention is therefore to provide a power supply circuit for an amplifier wherein the occurrence of such distortion is suppressed as much as possible by preventing undesirable effects caused by on and off switching of active elements while yet maintaining an excellent power conversion efficiency.